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Intelligent Switch Scheduling for Optical Networks on Chip

Paper accepted for presentation at the IEEE Symposium on High Performance Interconnects 2013

Optical networks on chip for multicore processors have been previously shown to have lower power consumption than their electronic equivalents.  However, switch scheduling dominates the latency of optical NoCs, limiting the overall system performance of optically interconnected processor.  This work by Muhammad Ridwan Madarbux, Anouk Van Laer and Dr Philip Watts proposes and evaluates a scheduling algorithm which intelligently uses information from the memory system to setup optical paths in advance of the message appearing at the input buffer.  In a 32-core x86 system, the algorithm has been shown to reduce the average message latency by between 31.8% and 70.6% for applications in the PARSEC benchmark suite.  

This paper is a significant achievement for Muhammad Ridwan Madarbux (pictured), still in the 1st year of his PhD.  He will present the work at the Symposium in San Jose, California, USA on 21-23 August 2013.