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Programmable computer chips could transform the Internet

New research makes dynamic changes to deployed hardware possible

Electrical engineers from UCL have developed a way to change the network functionality of a computer chipset while it simultaneously serves billions of data per second, all without disruptions. Their work has the potential to transform the way we design, program and operate the Internet.

Traditionally, the Internet and the data centres behind cloud computing have been developed using black box network gear, such as Ethernet switches, IP routers and Firewalls. Each of these deliver a particular task, commonly using application-specific integrated circuits (ASICs). These are extremely inflexible and costly as they cannot be changed throughout their operational lifetime, which can last years or even decades.

Recent work on network function virtualization (NFV) has sought to reduce costs and speed-up computer functionality. But the work has fallen short of delivering high performance at high bit rates.

Experts from UCL’s Optical Networks Group (ONG) believe they may have found a viable solution by developing novel reconfigurable computing methods. They developed a protocol independent switch on field-programmable gate array (FPGA) that allows computer programmers to independently change part of the hardware circuitry of an IT system while other hardware remain operational.

So each port or each data flow going through it, can be associated to a chain of accelerators that offer network functions – such as filtering, monitoring, forwarding, switching. Each of the accelerators can be swapped and service chain modified at runtime making the system protocol independent. Crucially, the team developed a new reliable protocol that allows infrastructure providers such as BT, AT&T, Google, Microsoft, Facebook to repurpose such accelerators over the network.  

Lead researcher Dr Georgios Zervas said: “Our research aims to deliver disruptive and transformative technologies for an open and hardware programmable ICT. We think this could be the answer that the tech world has been looking for in its search for an open, flexible and affordable hardware system, by fabricating and evolving deployed hardware.”

The remote partial reconfiguration technique incorporates proprietary protocol (ReON), which benefits the worldwide research community in building their hardware prototype. The team is confident that introducing ReON with programmable on chip switches will open a new architectural paradigm in next generation network.”

Such technology even in its infancy could allow hardware companies to develop and offer systems that hide the programming complexity, accelerating product development. Network providers could dynamically repurpose their deployed hardware to best fit their needs. 

UCL PhD students Qianqiao Chen and Vaibhawa Mishra worked with Dr Zervas to publish this research. Qianqiao Chen presented the work at ReConFig 2016, this year’s IEEE International Conference on Reconfigurable Computing and FPGAs.

Papers: Chen, Q., Mishra, V., Zervas, G, ‘Reconfigurable Computing for Network Function Virtualization: A Protocol Independent Switch’, IEEE International Conference on Reconfigurable Computing and FPGAs (Reconfig), Nov-Dec 2016

Mishra, V., Chen, Q., Zervas, G., REoN: A Protocol for Reliable Software-Defined FPGA Partial Reconfiguration over Network, IEEE IEEE International Conference on Reconfigurable Computing and FPGAs (Reconfig), Nov-Dec 2016